*** sh2core.c	Fri Jun 24 23:32:31 2011
--- sh2core.c	Sun Sep 26 21:55:40 2010
***************
*** 817,822 ****
     context->onchip.BDMRB.all = 0x00000000;
     context->onchip.BBRB = 0x0000;
     context->onchip.BRCR = 0x0000;
     context->onchip.CHCR0 = 0x00000000;
     context->onchip.CHCR1 = 0x00000000;
     context->onchip.DMAOR = 0x00000000;
--- 817,827 ----
     context->onchip.BDMRB.all = 0x00000000;
     context->onchip.BBRB = 0x0000;
     context->onchip.BRCR = 0x0000;
+ #ifdef GEKKO
+    context->onchip.SAR0= 0x00000000;
+    context->onchip.DAR0= 0x00000000;
+    context->onchip.TCR0= 0x00000000;
+ #endif
     context->onchip.CHCR0 = 0x00000000;
     context->onchip.CHCR1 = 0x00000000;
     context->onchip.DMAOR = 0x00000000;
***************
*** 868,883 ****
        case 0x005:
  //         LOG("Receive Data Register read: %02X PC = %08X\n", CurrentSH2->onchip.RDR, SH2Core->GetPC(CurrentSH2));
           return CurrentSH2->onchip.RDR;
        case 0x011:
           return CurrentSH2->onchip.FTCSR;
        case 0x012:         
           return CurrentSH2->onchip.FRC.part.H;
        case 0x013:
           return CurrentSH2->onchip.FRC.part.L;
        case 0x016:
           return CurrentSH2->onchip.TCR;
        case 0x017:
           return CurrentSH2->onchip.TOCR;
        case 0x080:
           return CurrentSH2->onchip.WTCSR;
        case 0x081:
--- 873,938 ----
        case 0x005:
  //         LOG("Receive Data Register read: %02X PC = %08X\n", CurrentSH2->onchip.RDR, SH2Core->GetPC(CurrentSH2));
           return CurrentSH2->onchip.RDR;
+ #ifdef GEKKO
+       case 0x010:
+          return CurrentSH2->onchip.TIER;
+ #endif
        case 0x011:
           return CurrentSH2->onchip.FTCSR;
        case 0x012:         
           return CurrentSH2->onchip.FRC.part.H;
        case 0x013:
           return CurrentSH2->onchip.FRC.part.L;
+ #ifdef GEKKO
+       case 0x014:
+          if (!(CurrentSH2->onchip.TOCR & 0x10))
+             return CurrentSH2->onchip.OCRA >> 8;
+          else
+             return CurrentSH2->onchip.OCRB >> 8;
+       case 0x015:
+          if (!(CurrentSH2->onchip.TOCR & 0x10))
+             return CurrentSH2->onchip.OCRA & 0xFF;
+          else
+             return CurrentSH2->onchip.OCRB & 0xFF;
+ #endif
        case 0x016:
           return CurrentSH2->onchip.TCR;
        case 0x017:
           return CurrentSH2->onchip.TOCR;
+ #ifdef GEKKO
+       case 0x018:
+          return CurrentSH2->onchip.FICR >> 8;
+       case 0x019:
+          return CurrentSH2->onchip.FICR & 0xFF;
+       case 0x060:
+          return CurrentSH2->onchip.IPRB >> 8;
+       case 0x062:
+          return CurrentSH2->onchip.VCRA >> 8;
+       case 0x063:
+          return CurrentSH2->onchip.VCRA & 0xFF;
+       case 0x064:
+          return CurrentSH2->onchip.VCRB >> 8;
+       case 0x065:
+          return CurrentSH2->onchip.VCRB & 0xFF;
+       case 0x066:
+          return CurrentSH2->onchip.VCRC >> 8;
+       case 0x067:
+          return CurrentSH2->onchip.VCRC & 0xFF;
+       case 0x068:
+          return CurrentSH2->onchip.VCRD >> 8;
+       case 0x0E0:
+          return CurrentSH2->onchip.ICR >> 8;
+       case 0x0E1:
+          return CurrentSH2->onchip.ICR & 0xFF;
+       case 0x0E2:
+          return CurrentSH2->onchip.IPRA >> 8;
+       case 0x0E3:
+          return CurrentSH2->onchip.IPRA & 0xFF;
+       case 0x0E4:
+          return CurrentSH2->onchip.VCRWDT >> 8;
+       case 0x0E5:
+          return CurrentSH2->onchip.VCRWDT & 0xFF;
+ #endif
        case 0x080:
           return CurrentSH2->onchip.WTCSR;
        case 0x081:
***************
*** 899,908 ****
     {
        case 0x060:
           return CurrentSH2->onchip.IPRB;
        case 0x0E0:
           return CurrentSH2->onchip.ICR;
        case 0x0E2:
           return CurrentSH2->onchip.IPRA;
        default:
           LOG("Unhandled Onchip word read %08X\n", (int)addr);
           return 0;
--- 954,1021 ----
     {
        case 0x060:
           return CurrentSH2->onchip.IPRB;
+ #ifdef GEKKO
+       case 0x062:
+          return CurrentSH2->onchip.VCRA;
+       case 0x064:
+          return CurrentSH2->onchip.VCRB;
+       case 0x066:
+          return CurrentSH2->onchip.VCRC;
+       case 0x068:
+          return CurrentSH2->onchip.VCRD;
+ #endif
        case 0x0E0:
           return CurrentSH2->onchip.ICR;
        case 0x0E2:
           return CurrentSH2->onchip.IPRA;
+ #ifdef GEKKO
+       case 0x0E4:
+          return CurrentSH2->onchip.VCRWDT;
+       case 0x140:
+          return CurrentSH2->onchip.BARA.part.H;
+       case 0x142:
+          return CurrentSH2->onchip.BARA.part.L;
+       case 0x144:
+          return CurrentSH2->onchip.BAMRA.part.H;
+       case 0x146:
+          return CurrentSH2->onchip.BAMRA.part.L;
+       case 0x148:
+          return CurrentSH2->onchip.BBRA;
+       case 0x160:
+          return CurrentSH2->onchip.BARB.part.H;
+       case 0x162:
+          return CurrentSH2->onchip.BAMRB.part.L;
+       case 0x164:
+          return CurrentSH2->onchip.BAMRB.part.H;
+       case 0x166:
+          return CurrentSH2->onchip.BARB.part.L;
+       case 0x168:
+          return CurrentSH2->onchip.BBRB;
+       case 0x170:
+          return CurrentSH2->onchip.BDRB.part.H;
+       case 0x172:
+          return CurrentSH2->onchip.BDMRB.part.L;
+       case 0x174:
+          return CurrentSH2->onchip.BDMRB.part.H;
+       case 0x176:
+          return CurrentSH2->onchip.BDRB.part.L;
+       case 0x178:
+          return CurrentSH2->onchip.BRCR;
+       case 0x1E2: // real BCR1 register is located at 0x1E2-0x1E3; Sega Rally OK
+          return CurrentSH2->onchip.BCR1;
+       case 0x1E6:
+          return CurrentSH2->onchip.BCR2;
+       case 0x1EA:
+          return CurrentSH2->onchip.WCR;
+       case 0x1EE:
+          return CurrentSH2->onchip.MCR;
+       case 0x1F2:
+          return CurrentSH2->onchip.RTCSR;
+       case 0x1F6:
+          return CurrentSH2->onchip.RTCNT;
+       case 0x1FA:
+          return CurrentSH2->onchip.RTCOR;
+ #endif
        default:
           LOG("Unhandled Onchip word read %08X\n", (int)addr);
           return 0;
***************
*** 916,921 ****
  u32 FASTCALL OnchipReadLong(u32 addr) {
     switch(addr)
     {
        case 0x100:
        case 0x120:
           return CurrentSH2->onchip.DVSR;
--- 1029,1040 ----
  u32 FASTCALL OnchipReadLong(u32 addr) {
     switch(addr)
     {
+ #ifdef GEKKO
+       case 0x058:
+          return CurrentSH2->onchip.IPRB;
+       case 0x070:
+          return ((CurrentSH2->onchip.DRCR0 << 16) | (CurrentSH2->onchip.DRCR1 << 8));
+ #endif
        case 0x100:
        case 0x120:
           return CurrentSH2->onchip.DVSR;
***************
*** 940,953 ****
        case 0x11C: // Acts as a separate register, but is set to the same value
        case 0x13C: // as DVDNTL after division
           return CurrentSH2->onchip.DVDNTUL;
        case 0x18C:
           return CurrentSH2->onchip.CHCR0;
        case 0x19C:
           return CurrentSH2->onchip.CHCR1;
        case 0x1B0:
           return CurrentSH2->onchip.DMAOR;
        case 0x1E0:
           return CurrentSH2->onchip.BCR1;
        default:
           LOG("Unhandled Onchip long read %08X\n", (int)addr);
           return 0;
--- 1059,1120 ----
        case 0x11C: // Acts as a separate register, but is set to the same value
        case 0x13C: // as DVDNTL after division
           return CurrentSH2->onchip.DVDNTUL;
+ #ifdef GEKKO
+       case 0x140:
+          return CurrentSH2->onchip.BARA.all;
+       case 0x144:
+          return CurrentSH2->onchip.BAMRA.all;
+       case 0x160:
+          return CurrentSH2->onchip.BARB.all;
+       case 0x164:
+          return CurrentSH2->onchip.BAMRB.all;
+       case 0x170:
+          return CurrentSH2->onchip.BDRB.all;
+       case 0x174:
+          return CurrentSH2->onchip.BDMRB.all;
+       case 0x180:
+          return CurrentSH2->onchip.SAR0;
+       case 0x184:
+          return CurrentSH2->onchip.DAR0;
+       case 0x188:
+          return CurrentSH2->onchip.TCR0;
+ #endif
        case 0x18C:
           return CurrentSH2->onchip.CHCR0;
+ #ifdef GEKKO
+       case 0x190:
+          return CurrentSH2->onchip.SAR1;
+       case 0x194:
+          return CurrentSH2->onchip.DAR1;
+       case 0x198:
+          return CurrentSH2->onchip.TCR1;
+ #endif
        case 0x19C:
           return CurrentSH2->onchip.CHCR1;
+ #ifdef GEKKO
+       case 0x1A0:
+          return CurrentSH2->onchip.VCRDMA0;
+       case 0x1A8:
+          return CurrentSH2->onchip.VCRDMA1;
+ #endif
        case 0x1B0:
           return CurrentSH2->onchip.DMAOR;
        case 0x1E0:
           return CurrentSH2->onchip.BCR1;
+ #ifdef GEKKO
+       case 0x1E4:
+          return CurrentSH2->onchip.BCR2;
+       case 0x1E8:
+          return CurrentSH2->onchip.WCR;
+       case 0x1EC:
+          return CurrentSH2->onchip.MCR;
+       case 0x1F0:
+          return CurrentSH2->onchip.RTCSR;
+       case 0x1F4:
+          return CurrentSH2->onchip.RTCNT;
+       case 0x1F8:
+          return CurrentSH2->onchip.RTCOR;
+ #endif
        default:
           LOG("Unhandled Onchip long read %08X\n", (int)addr);
           return 0;
***************
*** 1099,1104 ****
        case 0x0E5:
           CurrentSH2->onchip.VCRWDT = (CurrentSH2->onchip.VCRWDT & 0xFF00) | (val & 0x7F);
           return;
        default:
           LOG("Unhandled Onchip byte write %08X\n", (int)addr);
     }
--- 1266,1287 ----
        case 0x0E5:
           CurrentSH2->onchip.VCRWDT = (CurrentSH2->onchip.VCRWDT & 0xFF00) | (val & 0x7F);
           return;
+ #ifdef GEKKO
+       case 0x18C:
+          CurrentSH2->onchip.CHCR0 = (CurrentSH2->onchip.CHCR0 & 0x0FFF) | (val << 24);
+          return;
+       case 0x18D:
+          CurrentSH2->onchip.CHCR0 = (CurrentSH2->onchip.CHCR0 & 0xF0FF) | (val << 16);
+          return;
+       case 0x18E:
+          CurrentSH2->onchip.CHCR0 = (CurrentSH2->onchip.CHCR0 & 0xFF0F) | (val << 8);
+          return;
+       case 0x18F:
+          CurrentSH2->onchip.CHCR0 = (CurrentSH2->onchip.CHCR0 & 0xFFF0) | (val);
+          if ((CurrentSH2->onchip.DMAOR & 7) == 1 && (val & 0x3) == 1)
+             DMAExec();
+          return;
+ #endif
        default:
           LOG("Unhandled Onchip byte write %08X\n", (int)addr);
     }
***************
*** 1112,1117 ****
        case 0x060:
           CurrentSH2->onchip.IPRB = val & 0xFF00;
           return;
        case 0x080:
           // This and RSTCSR have got to be the most wackiest register
           // mappings I've ever seen
--- 1295,1314 ----
        case 0x060:
           CurrentSH2->onchip.IPRB = val & 0xFF00;
           return;
+ #ifdef GEKKO
+       case 0x062:
+          CurrentSH2->onchip.VCRA = val & 0x7F7F;
+          return;
+       case 0x064:
+          CurrentSH2->onchip.VCRB = val & 0x7F7F;
+          return;
+       case 0x066:
+          CurrentSH2->onchip.VCRC = val & 0x7F7F;
+          return;
+       case 0x068:
+          CurrentSH2->onchip.VCRD = val & 0x7F7F;
+          return;
+ #endif
        case 0x080:
           // This and RSTCSR have got to be the most wackiest register
           // mappings I've ever seen
***************
*** 1175,1184 ****
        case 0x0E2:
           CurrentSH2->onchip.IPRA = val & 0xFFF0;
           return;
        case 0x108:
        case 0x128:
           CurrentSH2->onchip.DVCR = val & 0x3;
           return;
        case 0x148:
           CurrentSH2->onchip.BBRA = val & 0xFF;
           return;
--- 1372,1426 ----
        case 0x0E2:
           CurrentSH2->onchip.IPRA = val & 0xFFF0;
           return;
+ #ifdef GEKKO
+       case 0x0E4:
+          CurrentSH2->onchip.VCRWDT = val & 0x7F7F;
+          return;
+ #endif
        case 0x108:
        case 0x128:
           CurrentSH2->onchip.DVCR = val & 0x3;
           return;
+ #ifdef GEKKO
+       case 0x140:
+          CurrentSH2->onchip.BARA.part.H = val;
+          return;
+       case 0x142:
+          CurrentSH2->onchip.BARA.part.L = val;
+          return;
+       case 0x144:
+          CurrentSH2->onchip.BAMRA.part.H = val;
+          return;
+       case 0x146:
+          CurrentSH2->onchip.BAMRA.part.L = val;
+          return;
+       case 0x160:
+          CurrentSH2->onchip.BARB.part.H = val;
+          return;
+       case 0x162:
+          CurrentSH2->onchip.BARB.part.L = val;
+          return;
+       case 0x164:
+          CurrentSH2->onchip.BAMRB.part.H = val;
+          return;
+       case 0x166:
+          CurrentSH2->onchip.BAMRB.part.L = val;
+          return;
+       case 0x170:
+          CurrentSH2->onchip.BDRB.part.H = val;
+          return;
+       case 0x172:
+          CurrentSH2->onchip.BDRB.part.L = val;
+          return;
+       case 0x174:
+          CurrentSH2->onchip.BDMRB.part.H = val;
+          return;
+       case 0x176:
+          CurrentSH2->onchip.BDMRB.part.L = val;
+       case 0x168:
+          CurrentSH2->onchip.BBRB = val & 0xFF;
+          return;
+ #endif
        case 0x148:
           CurrentSH2->onchip.BBRA = val & 0xFF;
           return;
